Technical Program

Paper Detail

Paper:DISPS-P2.8
Session:Algorithm and Architecture Optimization
Location:Poster Area J, West Bar, First Floor
Session Time:Thursday, May 16, 13:00 - 15:00
Presentation Time:Thursday, May 16, 13:00 - 15:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Compilers and tools for DSP implementation
Paper Title: AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS
Manuscript Link:  Click here to view manuscript on IEEE Xplore
Authors: Endri Bezati, Simone Casale-Brunet, École Polytechnique Fédérale de Lausanne, Switzerland; Romuald Mosqueron, School of Business and Engineering Vaud HES-SO, Switzerland; Marco Mattavelli, École Polytechnique Fédérale de Lausanne, Switzerland